In Brief:
- Scheme Outlay & Scope: Notified on August 31, 2026, the ₹1,27,500-crore policy builds upon Semicon 1.0 by targeting complete end-to-end semiconductor ecosystem self-reliance across six core pillars.
- Fiscal Support Rates: Offers 40% fiscal support for silicon fabs, 35% for compound/display fabs, 25%–35% for ATMP/OSAT packaging, and up to 75% for advanced R&D initiatives.
- Talent & Job Targets: Aims to generate 50,000 to 60,000 direct jobs while scaling up talent development by training 1,00,000 additional semiconductor engineers through 315 participating universities.
In a major push toward technological sovereignty, the Ministry of Electronics and Information Technology (MeitY) notified the ₹1,27,500-crore ($13.31 billion) "Semicon 2.0" scheme on August 31, 2026, following its initial Cabinet approval on July 15, 2026. Announcing the guidelines alongside IT Secretary S. Krishnan and Union Minister Ashwini Vaishnaw, the government outlined a six-pillar strategy covering domestic chip design (IP creation), capital equipment and materials manufacturing, silicon and compound fabs, ATMP/OSAT packaging, advanced node R&D, and specialized talent development.
The framework offers 40% capital expenditure support for silicon wafer fabs, 35% support for compound and display fabs, 25% to 35% for packaging facilities, and up to 75% for advanced R&D projects. The scheme projects to attract ₹4 lakh crore to ₹5 lakh crore in total private investment, positioning India to capture nearly 10% of the global semiconductor market over the next decade.
